Back |
Credit Hours: 3 Effective Term: Fall 2017 SUN#: None AGEC: None |
Credit Breakdown: 2 Lectures 3 Labs Times for Credit: 1 Grading Option: A, B, C, D, F Cross-Listed: |
Measurable Student Learning Outcomes |
---|
1. (Analysis Level) Identify and analyze FPGA designs.
2. (Synthesis Level) Design and implement LabVIEW applications using an FPGA module. 3. (Analysis Level) List, describe, and analyze the LabVIEW FPGA compiling process. 4. (Application Level) Compile LabVIEW FPGA VI. 3. (Evaluation Level) Troubleshoot LabVIEW compiling process and FPGA design errors. |
Internal/External Standards Accreditation |
None |